A 5.2 mW IEEE 802.15.6 HBC Standard Compatible Transceiver with Power Efficient Delay-Locked-Loop Based BPSK Demodulator

Citations

SCOPUS

40

초록

A Low-power IEEE 802.15.6 human body communication (HBC) fully compatible transceiver is implemented in 130 nm CMOS process. In this work, the proposed HBC transceiver satisfying all the standard requirements has four key features for low power consumption which includes: 1) low-power analog active filters for TX spectral mask: 30% power reduction; 2) delayed locked loop (DLL) based BPSK receiver with the S/H operation for turning off unnecessary blocks: 40% power reduction; 3) low-power mode (LP-mode) receiver with the received signal strength indicator (RSSI) output data: 50% power reduction; and 4) reconfigurable LNA with RSSI output data: 60% power reduction. As a result, the proposed transceiver can fully satisfy the HBC standard requirements while consuming 5.2 mW from the 1.2 V supply. © 1966-2012 IEEE.

키워드

Binary phase shift keyingPower demandReceiversStandardsSynchronizationTransceiversTransmitters
제목
A 5.2 mW IEEE 802.15.6 HBC Standard Compatible Transceiver with Power Efficient Delay-Locked-Loop Based BPSK Demodulator
저자
Cho, HyunwooLee, HyungwooBae, JoonsungYoo, Hoijun
DOI
10.1109/JSSC.2015.2475179
발행일
2015
유형
Article
저널명
IEEE Journal of Solid-State Circuits
50
11
페이지
2549 ~ 2559