Current monitoring circuit for fault detection in CMOS integrated circuit

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초록

This article presents a built-in current sensor (BICS), which detects faults using the current testing technique in CMOS integrated circuits. This circuit employs cross-coupled PMOS transistors, which are used as current comparators. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT). In addition, no extra power dissipation and high-speed fault detection are achieved. It can be applied to deep sub-micron processes. The validity and effectiveness are verified through the HSPICE simulation on circuits with faults. The entire area of the test chip is 116 x 65 mu m(2). The BICS occupies only 41 x 17 mu m(2) of the area of the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix 0.35 mu m 2-poly-4-metal N-well CMOS process.

키워드

current testingIDDQ testingBICSreliabilityIN CURRENT SENSORDESIGN
제목
Current monitoring circuit for fault detection in CMOS integrated circuit
저자
Kim, Jeong Beom
DOI
10.1080/00207210802354882
발행일
2008
유형
Article
저널명
International Journal of Electronics
95
10
페이지
999 ~ 1007