A Low-Power RF-to-BB-Current-Reuse Receiver Employing Simultaneous Noise and Input Matching and 1/f Noise Reduction for IoT Applications

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초록

A low-power low-noise RF-to-baseband (BB)-current-reuse quadrature receiver employing simultaneous noise and input power matching and 1/f noise reduction technique is proposed for the Internet of Things applications. The receiver shares bias current between a low-noise transconductor and a transimpedance amplifier with single supply voltage and employs a double-balanced current-mode passive mixer with 25% duty-cycle local oscillator (LO), thereby reducing power consumption. To improve noise performance in the direct-conversion or low-IF receiver, the proposed receiver architecture performs simultaneous noise and input power matching at the RF domain and 1/f noise reduction at the BB domain. The presented prototype, implemented in the 65-nm CMOS process, occupies an active die area of 0.559 mm(2) while consuming 3.6 mW at a supply voltage of 1.8 V. It achieves a voltage gain of 40.7 dB, an noise figure (NF) of 1.94 dB, S-11 of less than -10 dB, and an IIP3 of -25.6 dBm.

키워드

1/f noiseCMOScurrent-reuseenhanced machine type communication (eMTC)IEEE 80211ahinput power matchingInternet of Things (IoT)low-noise transconductornarrow band (NB)-IoTnoise matchingFRONT-END
제목
A Low-Power RF-to-BB-Current-Reuse Receiver Employing Simultaneous Noise and Input Matching and 1/f Noise Reduction for IoT Applications
저자
Kim, SinyoungKwon, Kuduck
DOI
10.1109/LMWC.2019.2932841
발행일
2019-09
유형
Article
저널명
IEEE Microwave and Wireless Components Letters
29
9
페이지
614 ~ 616